Computing and electronic devices continue to get smaller, even while performance remains the same or increases. Smaller computing and electronic devices are made possible by smaller electronic components. Some newer electronic circuit components have wide interfaces, and the manufacturing processes continue to enable smaller geometries on the components. Manufacturing processes can currently generate components that have a large number of I/O (input/output) signals lines in an I/O interface, and with a pitch between the signal lines that cannot practically be contacted for direct AC and DC performance testing. It will be understood that AC (alternating current) performance refers to the exchange of signals over the interface, and DC (direct current) performance refers to the biasing or voltage levels applied to signals, and parasitic leakage paths.
The decreasing size of the electronic components and the pitch between signal lines increases the difficulty of testing the devices. For many devices, the number of signal lines and the small pitch makes it impractical to directly test the I/O interface. A lack of direct testing has increased the risk that device manufacturers will not be able to achieve ultralow defects per million (DPM) targets with traditional testing. One specific area of technology in which such risks are currently being presented is with wide interface memory devices. Available testing methods are not practical in mass production (e.g., HVM (high volume manufacturing)) where the time required to test devices serially would be prohibitive.
Descriptions of certain details and implementations follow, including a description of the figures, which may depict some or all of the embodiments described below, as well as discussing other potential embodiments or implementations of the inventive concepts presented herein.